tag:Bluespec

Week In Review: Design, Low Power
ByJesse Allen- 13 Jan, 2023 - Comments: 0

With funding from the Semiconductor Research Corporation, a group of 10 universities is banding together to create the Processing with Intelligent Storage and Memory center, or PRISM, led by University of California San Diego. The $50.5 million PRISM center will focus on four different themes: novel memory and storage devices and circuits; next generation architectures; systems and software; an...» read more

Week In Review: Design, Low Power
ByJesse Allen- 01 Oct, 2021 - Comments: 0

Valens Semiconductor began trading on the New York Stock Exchange as VLN after a merger with special-purpose acquisition company (SPAC) PTK Acquisition Corp. Valens offers high-speed connectivity chips for the audio-video and automotive markets, including its HDBaseT technology for connectivity between ultra-HD video sources and remote displays and its in-vehicle high-speed links. The transacti...» read more

Standards, Open Source, and Tools
ByBrian Bailey- 10 May, 2021 - Comments: 1

Experts at the Table: Semiconductor Engineering discussed what open source verification means today and what it should evolve into with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Ashish Darbari, CEO of Axiomise; Simon Davidmann, CEO of Imperas Software; Serge Leef, program manager in the Microsystems Technology Office at DARPA; Tao Liu, staff hardware engineer...» read more

Week In Review: Design, Low Power
ByJesse Allen- 28 Aug, 2020 - Comments: 0

Tools & IP Monozukuri unveiled its IC/Package co-design tool, GENIO. GENIO integrates existing silicon and package EDA flows to create full co-design and I/O optimization of complex multi-chip designs. It works seamlessly across all existing EDA flows and comprises floor planning, I/O planning and end-to-end interconnect planning combined with cross-hierarchical pathfinding optimization....» read more

The Evolution Of High-Level Synthesis
ByBrian Bailey- 27 Aug, 2020 - Comments: 3

High-level synthesis is getting yet another chance to shine, this time from new markets and new technology nodes. But it's still unclear how fully this technology will be used. Despite gains, it remains unlikely to replace the incumbent RTL design methodology for most of the chip, as originally expected. Seen as the foundational technology for the next generation of EDA companies around the ...» read more

Week In Review: Design, Low Power
ByJesse Allen- 10 Jan, 2020 - Comments: 0

Synopsys will acquire certain IP assets of INVECAS. The acquisition expands Synopsys' DesignWare Logic Library, General Purpose I/O, Embedded Memory, Interface and Analog IP portfolio. The acquisition will also add a team of experienced R&D engineers to focus on physical IP across a range of process technologies. INVECAS will retain its HDMI IP and ASIC Design Solutions businesses. The deal...» read more

Week In Review: Design, Low Power
ByJesse Allen- 03 Jan, 2020 - Comments: 0

Apple and Imagination inked a new multi-year license agreement under which Apple has access to a wider range of Imagination’s intellectual property in exchange for license fees. In 2017, Apple had announced it would be developing its own graphics chips and phasing out use of Imagination's IP. Imagination, which had recently restructured, saw its stock price fall by half in the wake of the new...» read more

RISC-V Markets, Security And Growth Prospects
ByEd Sperling- 18 Nov, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss open instruction set hardware with Ben Levine, senior director of product management in Rambus' Security Division; Jerry Ardizzone, vice president of worldwide sales at Codasip; Megan Wachs, vice president of engineering at SiFive; and Rishiyur Nikhil, CTO of Bluespec. What follows are excerpts of that conversation. Part one of this discussion is ...» read more

RISC-V Challenges And Opportunities
ByEd Sperling- 24 Oct, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss open instruction set hardware and the future of RISC-V with Ben Levine, senior director of product management in Rambus' Security Division; Jerry Ardizzone, vice president of worldwide sales at Codasip; Megan Wachs, vice president of engineering at SiFive; and Rishiyur Nikhil, CTO of Bluespec. What follows are excerpts of that conversation. (L-...» read more

Week In Review: Design, Low Power
ByJesse Allen- 21 Dec, 2018 - Comments: 0

Gyrfalcon Technology released a 22nm AI accelerator ASIC chip with embedded MRAM. The Lightspeeur 2802M includes 40MB of memory to support large or multiple AI models, such as image classification and voice identification, within a single chip. Manufactured by TSMC, target applications include IoT endpoints, cloud solutions, and autonomous vehicles. Arm expanded its line of automotive-focuse...» read more

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